AON7409 30v p-channel mosfet general description product summary v ds i d (at v gs =-10v) -32a r ds(on) (at v gs =-10v) < 8.5m w r ds(on) (at v gs =-4.5v) < 17m w typical esd protection hbm class 3a 100% uis tested 100% r g tested symbol v ds the AON7409 combines advanced trench mosfet technology with a low resistance package to provide extremely low r ds(on) . this device is ideal for load switch and battery protection applications. parameter absolute maximum ratings t a =25c unless otherwise noted drain-source voltage -30v v maximum units -30 top view 12 3 4 8 76 5 dfn 3x3 ep top view bottom view pin 1 s g d v ds v gs i dm i as e as t j , t stg symbol t 10s steady-state steady-state r q jc 25 mj a a maximum junction-to-case c/w c/w maximum junction-to-ambient a d 1 75 1.3 c t c =25c 3.1 38.5 t c =100c t c =25c gate-source voltage drain-source voltage v -32 a v -30 -128 junction and storage temperature range -55 to 150 power dissipation a p dsm w t a =70c 2 t a =25c w 96 p d avalanche current c -12.5 t c =100c power dissipation b continuous drain current 80 -16 avalanche energy l=0.1mh c 40 t a =25c i dsm t a =70c pulsed drain current c continuous drain current g i d -25 thermal characteristics units maximum junction-to-ambient a c/w r q ja 30 60 40 parameter typ max rev 0: oct. 2012 www.aosmd.com page 1 of 6
AON7409 symbol min typ max units bv dss -30 v v ds =-30v, v gs =0v -1 t j =55c -5 i gss 10 ua v gs(th) gate threshold voltage -1.6 -2.1 -2.7 v i d(on) -128 a 6.8 8.5 t j =125c 9.6 11.5 12.8 17 m w g fs -43 s v sd -0.7 -1 v i s -32 a c iss 2142 pf c oss 474 pf c rss 363 pf r g 2.3 4.6 w q g (10v) 41 58 nc q g (4.5v) 18.5 27 nc q gs 15 nc q gd 6 nc t d(on) 13 ns t 12 ns electrical characteristics (t j =25c unless otherwise noted) static parameters parameter conditions drain-source breakdown voltage r ds(on) static drain-source on-resistance i dss reverse transfer capacitance v gs =0v, v ds =-15v, f=1mhz switching parameters m w on state drain current i d =-250 m a, v gs =0v v gs =-10v, v ds =-5v v gs =-10v, i d =-16a m a v ds =v gs , i d =-250 m a v ds =0v, v gs =25v zero gate voltage drain current gate-body leakage current v ds =-5v, i d =-16a v gs =-4.5v, i d =-10a forward transconductance v =-10v, v =-15v, r =0.9 w , gate resistance v gs =0v, v ds =0v, f=1mhz total gate charge i s =-1a,v gs =0v turn-on rise time v gs =-10v, v ds =-15v, i d =-16a gate source charge gate drain charge total gate charge maximum body-diode continuous current g input capacitance output capacitance turn-on delaytime dynamic parameters diode forward voltage t r 12 ns t d(off) 34 ns t f 18.5 ns t rr 17.5 ns q rr 44.5 nc this product has been designed and qualified for th e consumer market. applications or uses as critical components in life support devices or systems are n ot authorized. aos does not assume any liability ar ising out of such applications or uses of its products. aos reserves the right to improve product design, functions and reliability without notice. body diode reverse recovery time i f =-16a, di/dt=500a/ m s v gs =-10v, v ds =-15v, r l =0.9 w , r gen =3 w turn-off fall time body diode reverse recovery charge i f =-16a, di/dt=500a/ m s turn-off delaytime turn-on rise time a. the value of r q ja is measured with the device mounted on 1in 2 fr-4 board with 2oz. copper, in a still air environ ment with t a =25 c. the power dissipation p dsm is based on r q ja t 10s value and the maximum allowed junction temperat ure of 150 c. the value in any given application depends on the user's specific board de sign. b. the power dissipation p d is based on t j(max) =150 c, using junction-to-case thermal resistance, and i s more useful in setting the upper dissipation limit for cases where additional heatsi nking is used. c. repetitive rating, pulse width limited by juncti on temperature t j(max) =150 c. ratings are based on low frequency and duty cycl es to keep initial t j =25 c. d. the r q ja is the sum of the thermal impedance from junction t o case r q jc and case to ambient. e. the static characteristics in figures 1 to 6 are obtained using <300 m s pulses, duty cycle 0.5% max. f. these curves are based on the junction-to-case t hermal impedance which is measured with the device mounted to a large heatsink, assuming a maximum junction temperature of t j(max) =150 c. the soa curve provides a single pulse rating. g. the maximum current rating is package limited. h. these tests are performed with the device mounte d on 1 in 2 fr-4 board with 2oz. copper, in a still air environ ment with t a =25 c. rev 0: oct. 2012 www.aosmd.com page 2 of 6
AON7409 typical electrical and thermal characteristics 17 52 10 0 18 0 20 40 60 80 0 1 2 3 4 5 6 -i d (a) -v gs (volts) figure 2: transfer characteristics (note e) 0 2 4 6 8 10 12 14 16 18 0 5 10 15 20 25 30 r ds(on) (m w ww w ) -i d (a) figure 3: on-resistance vs. drain current and gate voltage (note e) 0.8 1 1.2 1.4 1.6 0 25 50 75 100 125 150 175 normalized on-resistance temperature (c) figure 4: on-resistance vs. junction temperature (note e) v gs =-4.5v i d =-10a v gs =-10v i d =-16a 25 c 125 c v ds =-5v v gs =-4.5v v gs =-10v 0 20 40 60 80 0 1 2 3 4 5 -i d (a) -v ds (volts) fig 1: on-region characteristics (note e) v gs =-3.5v -4.5v -10v -5v -7v -4v 40 1.0e-05 1.0e-04 1.0e-03 1.0e-02 1.0e-01 1.0e+00 1.0e+01 1.0e+02 0.0 0.2 0.4 0.6 0.8 1.0 1.2 -i s (a) -v sd (volts) figure 6: body-diode characteristics (note e) 25 c 125 c (note e) 0 5 10 15 20 25 30 2 4 6 8 10 r ds(on) (m w ww w ) -v gs (volts) figure 5: on-resistance vs. gate-source voltage (note e) i d =-16a 25 c 125 c rev 0: oct. 2012 www.aosmd.com page 3 of 6
AON7409 typical electrical and thermal characteristics 17 52 10 0 18 0 2 4 6 8 10 0 10 20 30 40 50 -v gs (volts) q g (nc) figure 7: gate-charge characteristics 0 500 1000 1500 2000 2500 3000 0 5 10 15 20 25 30 capacitance (pf) -v ds (volts) figure 8: capacitance characteristics c iss 80 120 160 200 0.0001 0.001 0.01 0.1 1 10 power (w) pulse width (s) figure 10: single pulse power rating junction-to- case (note f) c oss c rss v ds =-10v i d =-16a t j(max) =150 c t c =25 c 10 m s 0.0 0.1 1.0 10.0 100.0 1000.0 0.01 0.1 1 10 100 -i d (amps) -v ds (volts) figure 9: maximum forward biased safe operating area (note f) 10 m s 10ms 1ms dc r ds(on) limited t j(max) =150 c t c =25 c 100 m s 40 (note f) 0.01 0.1 1 10 1e-05 0.0001 0.001 0.01 0.1 1 10 100 z q qq q jc normalized transient thermal resistance pulse width (s) figure 11: normalized maximum transient thermal imp edance (note f) single pulse d=t on /t t j,pk =t c +p dm .z q jc .r q jc t on t p d in descending order d=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse operating area (note f) r q jc =1.3 c/w rev 0: oct. 2012 www.aosmd.com page 4 of 6
AON7409 typical electrical and thermal characteristics 17 52 10 0 18 0 20 40 60 80 100 0 25 50 75 100 125 150 power dissipation (w) t case (c) figure 13: power de-rating (note f) 0 5 10 15 20 25 30 35 40 0 25 50 75 100 125 150 -current rating i d (a) t case (c) figure 14: current de - rating (note f) 1 10 100 1000 10000 1e-05 0.001 0.1 10 1000 power (w) pulse width (s) figure 15: single pulse power rating junction - to - t a =25 c 1 10 100 1000 1 10 100 1000 -i ar (a) peak avalanche current time in avalanche, t a ( m mm m s) figure 12: single pulse avalanche capability (note c) t a =25 c t a =150 c t a =100 c t a =125 c 40 0.001 0.01 0.1 1 10 1e-05 0.0001 0.001 0.01 0.1 1 10 100 1000 z q qq q ja normalized transient thermal resistance pulse width (s) figure 16: normalized maximum transient thermal imp edance (note h) single pulse d=t on /t t j,pk =t a +p dm .z q ja .r q ja t on t p d in descending order d=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse figure 14: current de - rating (note f) figure 15: single pulse power rating junction - to - ambient (note h) r q ja =75 c/w rev 0: oct. 2012 www.aosmd.com page 5 of 6
AON7409 vdc ig vds dut vdc vgs vgs qg qgs qgd charge gate charge test circuit & waveform - + - + -10v vdd id vgs vds unclamped inductive switching (uis) test circuit & waveforms vds l - 2 e = 1/2 li ar ar bv dss vdc dut vdd vgs vds vgs rl rg resistive switching test circuit & waveforms - + vgs vds t t t t t t 90% 10% r on d(off) f off d(on) vdd vgs vgs rg dut vdc vgs id vgs - + i ar ig vgs - + vdc dut l vgs isd diode recovery test circuit & waveforms vds - vds + di/dt rm rr vdd vdd q = - idt t rr -isd -vds f -i -i rev 0: oct. 2012 www.aosmd.com page 6 of 6
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